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Liao, W.*; Hashimoto, Masanori*; Manabe, Seiya*; Watanabe, Yukinobu*; Abe, Shinichiro; Tampo, Motonobu*; Takeshita, Soshi*; Miyake, Yasuhiro*
IEEE Transactions on Nuclear Science, 67(7), p.1566 - 1572, 2020/07
Times Cited Count：0 Percentile：0.01(Engineering, Electrical & Electronic)Muon-induced single event upset (SEU) is predicted to increase with technology scaling. The angle of incidence of terrestrial muons is not always perpendicular to the chip surface. Consequently, the impact of the angle of incidence of muons on SEUs should be evaluated. This study conducts negative muon irradiation tests on bulk SRAM and FDSOI SRAM at two angles of incidence: 0 degree (vertical) and 45 degree (tilted). The tilted incidence drifts the muon energy peak to a higher energy. Moreover, the SEU characteristics (i.e., such as the voltage dependences of the SEU cross sections and multiple cells upset patterns) between the vertical and tilted incidences are similar.
Hashimoto, Masanori*; Kobayashi, Kazutoshi*; Furuta, Jun*; Abe, Shinichiro; Watanabe, Yukinobu*
Integration, 69, p.161 - 179, 2019/11
Times Cited Count：11 Percentile：62.39(Computer Science, Hardware & Architecture)Soft error originating from cosmic ray is a serious concern for reliability demanding applications. Device miniaturization and lower voltage operation degrade the immunity of SRAM and flip-flops, and then soft error countermeasures will be demanded in more and more products. This paper characterizes and discusses soft error rates of SRAM and flip-flops in the terrestrial environment with the results of investigation for soft error phenomena by measurements and simulations.
Liao, W.*; Hashimoto, Masanori*; Manabe, Seiya*; Abe, Shinichiro; Watanabe, Yukinobu*
IEEE Transactions on Nuclear Science, 66(7), p.1390 - 1397, 2019/07
Times Cited Count：13 Percentile：81.94(Engineering, Electrical & Electronic)Multiple-cell upset (MCU) in static random access memory (SRAM) is a major concern in radiation effects on microelectronic devices since it can spoil error correcting codes. Neutron-induced MCUs have been characterized for terrestrial environment. On the other hand, negative muon-induced MCUs were recently reported. Neutron- and negative muon-induced MCUs are both caused by secondary ions, and hence, they are expected to have some similarity. In this paper, we compare negative muon- and neutron-induced MCUs in 65-nm bulk SRAMs at the irradiation experiments using spallation and quasi-monoenergetic neutrons and monoenergetic negative muons. The measurement results show that the dependencies of MCU event cross section on operating voltage are almost identical. The Monte Carlo simulation is conducted to investigate the deposited charge. The distributions of deposited charge obtained by the simulation are consistent with the above-mentioned experimental observations.
Manabe, Seiya*; Watanabe, Yukinobu*; Liao, W.*; Hashimoto, Masanori*; Abe, Shinichiro
IEEE Transactions on Nuclear Science, 66(7), p.1398 - 1403, 2019/07
Times Cited Count：8 Percentile：65.94(Engineering, Electrical & Electronic)Cosmic ray-induced soft errors have been recognized as a major threat for electronics used at ground level. Recently, cosmic-ray muon-induced soft errors have received much attention due to the reduction of soft error immunity on SRAMs. In the previous studies, muon-induced soft error rates (SERs) for various technology devices were predicted with only the positive muon irradiation tests and simulation. In this paper, the muon-induced SEU rates for the 65-nm bulk and UTBB-SOI SRAMs are estimated by using the experimental data of both negative and positive muons. The experimental results showed that the negative muon SEU cross sections for the bulk SRAM are significantly larger than those for the UTBB-SOI. Estimation of muon-induced SEU rates at ground level was performed using PHITS with the experimental results. The muon-induced SER on the first floor of the building was estimated to be at most 10% of the neutron-induced SER on the same floor.
Manabe, Seiya*; Watanabe, Yukinobu*; Liao, W.*; Hashimoto, Masanori*; Nakano, Keita*; Sato, Hikaru*; Kin, Tadahiro*; Abe, Shinichiro; Hamada, Koji*; Tampo, Motonobu*; et al.
IEEE Transactions on Nuclear Science, 65(8), p.1742 - 1749, 2018/08
Times Cited Count：9 Percentile：62.29(Engineering, Electrical & Electronic)Recently, the malfunction of microelectronics caused by secondary cosmic-ray muon is concerned as semiconductor devices become sensitive to radiation. In this study, we have performed muon irradiation testing for 65-nm ultra-thin body and thin buried oxide (UTBB-SOI) SRAMs in the Japan Proton Accelerator Research Complex (J-PARC), in order to investigate dependencies of single event upset (SEU) cross section on incident muon momentum and supply voltage. It was found that the SEU cross section by negative muon are approximately two to four times larger than those by positive muon in the momentum range from 35 MeV/c to 39 MeV/c. The supply voltage dependence of muon-induced SEU cross section was measured with the momentum of 38 MeV/c. SEU cross sections decrease with increasing supply voltage, but the decreasing of SEU cross section by negative muon is gentler than that by positive muon. Experimental data of positive and negative muon irradiation with the momentum of 38 MeV/c were analyzed by PHITS. It was clarified that the negative muon capture causes the difference between the SEU cross section by negative muon and that by positive muon.
Liao, W.*; Hashimoto, Masanori*; Manabe, Seiya*; Watanabe, Yukinobu*; Abe, Shinichiro; Nakano, Keita*; Sato, Hikaru*; Kin, Tadahiro*; Hamada, Koji*; Tampo, Motonobu*; et al.
IEEE Transactions on Nuclear Science, 65(8), p.1734 - 1741, 2018/08
Times Cited Count：15 Percentile：81.29(Engineering, Electrical & Electronic)Soft error induced by secondary cosmic-ray muon is concerned since susceptibility of semiconductor device to soft error increases with the scaling of technology. In this study, we have performed irradiation tests of muons on 65-nm bulk CMOS SRAM in the Japan Proton Accelerator Research Complex (J-PARC) and measured soft error rate (SER) to investigate mechanism of muon-induced soft errors. It was found that SER by negative muon increases above 0.5 V supply voltage, although SER by positive muon increases monotonically as the supply voltage lowers. SER by negative muon also increases with forward body bias. In addition, negative muon causes large multiple cell upset (MCU) of more than 20 bits and the ratio of MCU events to all the events is 66% at 1.2V supply voltage. These tendencies indicate that parasitic bipolar action (PBA) is highly possible to contribute to SER by negative muon. Experimental data are analyzed by PHITS. It was found that negative muon can deposit larger charge than positive muon, and such events that can deposit large charge may trigger PBA.
